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REV. C
4
AD7816/AD7817/AD7818SPECIFICATIONS
Parameter
A Version   *B Version  *S Version   Unit
Test Conditions/Comments
ANALOG INPUTS
7
(AD7817 and AD7818)
Input Voltage Range
V
REF
V
REF
V
REF
V max
0
0
0
V min
Input Leakage
1
1
1
礎 min
Input Capacitance
10
10
10
pF max
LOGIC INPUTS
4
Input High Voltage, V
INH
2.4
2.4
2.4
V min
V
DD
 = 5 V 10%
Input Low Voltage, V
INL
0.8
0.8
0.8
V max
V
DD
 = 5 V 10%
Input High Voltage, V
INH
2
2
2
V min
V
DD
 = 3 V 10%
Input Low Voltage, V
INL
0.4
0.4
0.4
V max
V
DD
 = 3 V 10%
Input Current, I
IN
3
3
3
礎 max
Typically 10 nA, V
IN
 = 0 V to V
DD
Input Capacitance, C
IN
10
10
10
pF max
LOGIC OUTPUTS
4
Output High Voltage, V
OH
I
SOURCE
 = 200 礎
4
4
4
V min
V
DD
 = 5 V 10%
2.4
2.4
2.4
V min
V
DD
 = 3 V 10%
Output Low Voltage, V
OL
I
SINK
 = 200 礎
0.4
0.4
0.4
V max
V
DD
 = 5 V 10%
0.2
0.2
0.2
V max
V
DD
 = 3 V 10%
High Impedance Leakage Current   1
1
1
礎 max
High Impedance Capacitance
15
15
15
pF max
NOTES
*B and S Versions apply to AD7817 only. For operating temperature ranges, see Ordering Guide.
1
AD7816 and AD7817 temperature sensors specified with external 2.5 V reference, AD7818 specified with on-chip reference. All other specifications with external
and on-chip reference (2.5 V). For V
DD
 = 2.7 V, T
A
 = 85癈 max and temperature sensor measurement error = 3癈.
2
See Terminology.
3
The accuracy of the temperature sensor is affected by reference tolerance. The relationship between the two is explained in the section titled Temperature Measure-
ment Error Due to Reference Error.
4
Sample tested during initial release and after any redesign or process change that may affect this parameter.
5
On-chip reference shuts down when external reference is applied.
6
All specifications are typical for AD7818 at temperatures above 85癈 and with V
DD
 greater than 3.6 V.
7
Refers to the input current when the part is not converting. Primarily due to reverse leakage current in the ESD protection diodes.
Specifications subject to change without notice.
CHARGE
REDISTRIBUTION
DAC
CLOCK
DATA
OUT
D
IN/OUT
SCLK
RD/WR
CONVST
AGND
CONTROL
REG
A
B
OVERTEMP
REG
A > B
OTI
CONTROL
LOGIC
V
BALANCE
SAMPLING
CAPACITOR
MUX
REF
2.5V
TEMP
SENSOR
REF
IN
V
DD
AD7816
Figure 1.  AD7816 Functional Block Diagram
CHARGE
REDISTRIBUTION
DAC
CLOCK
GENERATOR
DATA
OUT
D
IN/OUT
SCLK
RD/WR
CONVST
AGND
CONTROL
REG
A
B
OVERTEMP
REG
A > B
OTI
CONTROL
LOGIC
V
BALANCE
SAMPLING
CAPACITOR
MUX
REF
2.5V
TEMP
SENSOR
V
DD
V
IN1
AD7818
Figure 2.  AD7818 Functional Block Diagram
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